Pavan Hanumolu's Course on Microelectronics (AGH University, Kraków)

#clock #SerDes #circuits #microelectronics #electronics #integrated #design #pll #asic #ic
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Course on selected aspects of microelectronics design: 

  • DFE (Decision Feedback Equalizer)
  • Clock and data recovery
  • Charge-pump phase-locked loops (CPLLs)
  • Digital PLLs
  • Analog/digital (hybrid) PLLs
  • Multiplying delay-locked loops
  • RC oscillators

Registration Link for Day 1: PLL topics (26th May) with details and agenda:  https://events.teams.microsoft.com/event/e97c8b54-8804-4679-a14c-3332ac010793@4fbe5e74-f50a-4a5b-8c87-f71c872ecfee?fbclid=IwZXh0bgNhZW0CMTAAAR75BMuxKD807e6LVtSfHwRpsXtxTYFLBy_GgpVgoxQUnCD-W5zjr1SmsUEGkw_aem_8Fyq6qhqjCEbHr00ZxRwww 

Registration Link for Day 2: SerDes topics (27th May) with details and agenda: https://events.teams.microsoft.com/event/24a33f16-6c8a-48b4-b046-507e8c520b99@4fbe5e74-f50a-4a5b-8c87-f71c872ecfee?fbclid=IwZXh0bgNhZW0CMTAAAR4gDkD06nPjMLSN0bZOEEqHZdu6kd1Le68Xct09jSymL93YL5piLR4oL_zg3A_aem_F1G9Mwmeq5kO4JRIoL9M-A 

Registration Link for Day 3: RC oscillators topics (28th May) with details and agenda:  https://events.teams.microsoft.com/event/48ebe056-a5fb-4b34-80e9-90e61ca72c38@4fbe5e74-f50a-4a5b-8c87-f71c872ecfee?fbclid=IwZXh0bgNhZW0CMTAAAR6qXXXLzGDjhalq4XYbUW15eyc_ka16iXiCBf0Eh3z0KjYYIao-Ar0RDAvy4g_aem_8idkY6EyKZVRyMvUSD9T-w 


  Date and Time

  Location

  Hosts

  Registration


  • Start time: 26 May 2025 11:00 AM UTC
  • End time: 28 May 2025 04:00 PM UTC
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  • AGH University of Kraków
  • Krakow, Malopolskie
  • Poland 30-059
  • Building: B1
  • Room Number: H24 lecture hall
  • Contact Event Host
  • Co-sponsored by Silicon Creations